Why don't we make CPUs with 1000s of layers to make use of space in the third dimension?
The two killer reasons are yield, and heat.
Yield. Every time you do a process step, you get less than 100% perfection. Let's say you get 99% perfection per step. In a process with 20 steps, you would be down to 82%. In a process with 1000 steps, you would be down to 43 ppm, 43 successful builds for every million wafers started.
Heat. Our existing designs are already limited by how fast we can extract heat from the bottom of the die. So neither the opportunity to generate more heat, nor the opportunity to generate that heat further away from where it can be dissipated, is of any real use to us.
Those said, there are some devices building up into the 3rd dimension, bonding several finished wafers together, which mitigates the yield issue. Those stacked wafers tend to be memory, which don't use anything like the power of a CPU, which mitigates the heat issue.
Heat removal is the issue.
Already some chips have higher energy density than a nuclear reactor.
Consider a hair_drier ---- 1,500 watts with a air_blast fan to cool the tungsten coils. And the coils glow dull red.
But what would you get from that?
- The number of transistors per mm² of mask you get would still be the same, you'd just have more masks
- Alignment of multiple masks is way harder, the more masks need to be aligned.
- You'd probably need multiple extra interconnect layers for each extra transistor layer
- Making a connection between layers is more effort than making a connection within a layer.
- Heat dissipation would be worse