Why doesn't LTSpice predict this op-amp oscillation?
There are different models for the LM358 unit. PSpice simulations based on "LM358" result in a phase margin of app. 50...60 deg. But apparently, this is a very simple model.
However, when using the LM358/NS model the margin is slightly negative! This explains the observed instability during measurements. Hence, external stabilization of the feedback scheme is necessary.
Compensation: A compensation scheme (series connection R=500...1000 Ohms and C=50...100nF) at the opamp output node provides a phase margin of app. 50 deg. (simulation).
The LTSpice simulation cannot account for circuit items that you have not entered: in this case, your breadboard wiring which is adding a filter (a RLC filter at that).
What you are seeing is Step response when you start driving the (almost) square wave into the amplifier. At the point where you initially pulse the input (having been held quiet for a significant amount of time) you are seeing damped response transients (apparent on the first few switching cycles) and then becomes closer to what you expected to see.
Although the FET is probably a low enough capacitance for the amplifier to drive, it is normal practice to decouple the gate capacitance through a resistor. This will form a low pass filter at the gate of the FET, so there is a trade-off of circuit response to amplifier ringing / overshoot, which is what you see once the initial step response has disappeared. There is also a pole from the inverting input to circuit reference (ground), and it is common to see a small capacitor in the feedback loop of about the same capacitance to compensate for this.
The value you should use is circuit layout dependent, but in this case I would start with about 100pF (on a properly laid out PCB this value would be more like 5pF to 10pF).
On amplifier ringing, there may be graphs in the datasheet that shows overshoot / undershoot vs. various capacitive loads. This is quite common in modern amplifier datasheets.
HTH
I would not have applied such a scheme. This scheme is easily converted into a stable. Between the output and the gate of the transistor put resistor R1 = 1kOhm. Between the source of the transistor and the inverting input of the operational amplifier put a resistor R2 = 10kOhm. Between the output and the inverting input of the operational amplifier put a capacitor C1 = 1000pF.