Why are the semiconductor chips (DRAM) volatile
DRAM is built as a capacitor and a switch for each bit - the data is stored as a charge on the capacitor.
It is pretty much impossible to make a perfect capacitor and a perfect transistor, certainly not on the tiny scale used in DRAM chips. There are leakage currents within the system - between the capacitor plates, across the channel of the transistor, etc.
This means that the charge stored on the capacitor will, over time, discharge. As the charge dissipates, the voltage on the plates gets smaller and smaller until it is indistinguishable whether it is a 1 or a 0 - it ends up being somewhere in between. At this point the data is lost or at the very least corrupted.
In practice, the way this is avoided is to periodically read every data bit in the RAM and then write the same value back. What this does is rebuild the charge on the capacitor to replace any that has leaked away. This process is called refreshing. If you turn the power off, the controller that is periodically refreshing the DRAM turns off and so it is no longer restoring the charge on each bit and the data eventually seeps away.
Furthermore, during operation when you access a bit in the DDR, the capacitor discharges a little bit through the access transistor - as the charge on the capacitor is shared with the capacitance of the access lines. So in order for the bit to not change, you have to write the same value back to restore the charge in the capacitor.
Nearly all forms of computer memory store information in the form of electrical charges, or to be more precise, the patterns in which electrons are distributed. Storing information generally entails allowing electrons to move to the places where they're supposed to be and away from those they aren't; holding information entails making it difficult for electrons to move where they shouldn't, if some do, using an external source of energy to repopulate the places that should have electrons and re-empty the places that shouldn't.
As a general rule, it's easy to make something that can switch between offering extremely low resistance and moderately high resistance to electron flow, or that can switch between moderately low resistance and extremely high resistance, but it's often not practical to switch between extremely low and extremely high resistance. The more quickly electrons are able to flow into the places they're supposed to within a RAM, the less effectively they'll be held there. Memory technologies like flash make it very difficult for electrons to flow where they're not supposed to, but on the flip side they also make it much harder to get the electrons where they need to be in the first place.
Incidentally, static RAM chips have a circuit for each memory cell to continuously charge or empty it as necessary for it to keep its state; in a DRAM chip, the circuity responsible for charging/emptying any given cell will also be shared with thousands of others. Having this circuitry shared between some cells which hold ones and some which hold zeros means that it will have to repeatedly switch between charging and charging memory cells; all that switching takes energy. Static RAM lets each piece of circuitry remain in charging or discharging mode without wasting any energy switching modes.
Drams store their bits on capacitors and there are transistors that connect to select each of these caps for reading and writing by the sense amplifiers. Even the best transistors have leakage which means the capacitors will slowly discharge over time. This is also why drams have a requirement for refresh cycles.