Should I use a resistor between the gate driver and MOSFET (gate pin)?

Maybe. The MC34152 datasheet pp.8 on shows a series Rg to damp oscillations, and reverse-bias Schottky diodes for catching negative ringing spikes at the driver. Wouldn't hurt to have these in your layout. You could stuff zero-ohm for Rg if you don't need damping, and no-stuff the diodes if you find the ringing isn't too bad. Have one resistor/diode per FET, don't share them. Place them near the gate.

No pull-down is needed at the gate drive. But you will want a pull-down on the driver input to make the default state 'off'.

Also, while we're discussing the inputs - tie them together and use both of the separate outputs, one for each FET. The way you have it - driving 2 FETS together - kind of defeats the purpose of the buffer.

Finally, if your motor is a normal brush type you will want to use a freewheel diode across it to catch the flyback spike when the switches turn off. For BLDC this isn't an issue. Yes, C2 does this too, but the diode is better.


You might not need a gate resistor but if this is a custom PCB, you should make space for one and just jumper it if it is not needed. Gate resistors slow down the rise time which can result in EMI, ringing, and damaging spikes. Ferrite beads can also be used instead of resistors.

You want one resistor per gate and you want the resistor close to the gate. This is for ringing issues should they arise. You don't want to share gate resistors because parallel MOSFETs can ring with each other.

You should have a pull-down if your drive circuit doesn't sink it when powered is off since your MOSFET gate capacitance will just remain charged and keep the MOSFET on. It also helps keep the MOSFET in a default state if your driver is busy powering up if your driver doesn't handle that well either. I don't think you need one with the gate driver you are using.

You should have a flyback diode anti-parallel to your motor. C2 does help though. Your gate driver IC also needs a decoupling capacitor.


Some FET circuits, with various parasitic capacitances (including inside the FET) and inductances (including the FET packaging) and lumped loads, WILL OSCILLATE.

Having gate resistances (as an option) provides a means to dampen the circulating energy, if the C_gate_drain or C_gate_source is in the resonant loop.