In theory, is it possible to make a logic gate that uses zero current?

Yes. You can make a gate that switches with zero current if you don't mind waiting an infinite amount of time ;) Since current is change in charge over change in time, as the change in time goes to infinity the current goes to zero. Run your logic as slow as you can while meeting your other system specifications.

Your homework assignment for tonight is to read the "Thermodynamics of Computing" chapter from "Feynman's Lectures on Computation" ;)

It is not possible to make an electronic logic gate that functions even when its current is always zero.

However, it is possible to arrange CMOS electronic logic gates in such a way that the energy capacitively stored on the transistor gates is later returned to the power supply, so it is using almost zero net power. Once the system is powered up and all the bypass capacitors are fully charged, those logic gates can do an arbitrarily large amount of computation while pulling nearly zero current from the battery. Such arrangements are often called non-destructive computing.

Also, there are many ways to build logically equivalent computational structures without any electronic devices. Such non-electronic logic gates naturally use zero current, although nearly all of them require much more power to operate than their logically equivalent electronic logic gate.

non-electronic computing

Some non-electronic logic gates are listed in the article "Ten weirdest computers".

A few more non-electronic logic gates that are apparently not quite weird enough to make that article:

David Cary has designed a CPU to be built entirely out of spool valves, and is still pondering whether to power the thing with traditional hydraulic oil pressure, water pressure, or air pressure.

The fluidic logic gates have no moving parts, if you don't count the fluid moving through them as a "part".

(Is there an article on Wikipedia or some other wiki with a list of ways to implement the abstract concept of a "logic gate" ?)

non-destructive computing

Non-destructive computing, also called reversible computing, Charge Recovery Logic, or Adiabatic Logic, involves gates that use almost zero power.

When a computational system erases a bit of information, it must dissipate a theoretical minimum energy of kT ln(2) -- the von Neumann-Landauer limit -- where k is Boltzmann's constant and T is the temperature.

Most logic gates erase a bit of information for every logic operation. However, there are a few logic gates that preserve every bit. In theory these non-destructive logic gates could use far less power than the theoretical minimum power of bit-destructive logic gates.

"Reversible Logic" by Ralph C. Merkle at Zyvex

RevComp - The Reversible and Quantum Computing Research Group has some nice photos of their reversible CPU.

No, it is not possible.

The gate capacitance is a function of the transistor geometry and the properties of the transistor materials. There will always be capacitance. In an effort to minimise capacitance there will always be trade off between transistor speed, voltage breakdown, gain and other device properties.

Not only that, but in order to use the output of the gate, the transistor must drive any output capacitance. Again, the output capacitance is a function of the wire geometry and the properties of the surrounding materials.

There are also other leakage effects. Across the drain and source of any transistor in the off state and even some leakage current into the gate. While these effects are for the most part negligible in actual silicon parts, you would come up against them sooner or later in your quest for a zero-current gate.