Depend on the make file itself

A safe bet, but a terrible idea. Example: you're using automake and update Makefile.am to add a single source file. The correct response is to compile just the new file and link it in. In your scheme everything would be rebuilt.

Moreover, adding the dependency isn't going to do anything unless you touch the file, something like:

$(SRCS): Makefile
    touch $@

This will then trip up editors that use the mtime to detect concurrent modification (emacs is one example).

If you're doing something major, just run make clean all after doing the change.

Make sure the object files depend on the makefile:

$(OBJFILES) : Makefile

Where Makefile is the name of the make file.

Since GNU make version 4.3 it is now possible with the use of those two special variable:

1. .EXTRA_PREREQS
   • To add new prerequisite to every target
2. MAKEFILE_LIST
   • To get the path of the make file

To have every target depend on the current make file:

Put near the top of the file (before any include since it would affect the MAKEFILE_LIST) the following line:

.EXTRA_PREREQS:= $(abspath $(lastword $(MAKEFILE_LIST)))

To have every target depend on the current make file and also the make files which were included

Put the following line at the end of your file:

    .EXTRA_PREREQS+=$(foreach mk, ${MAKEFILE_LIST},$(abspath ${mk}))