Bypass capacitors between via and chip?

The EMC right approach is C19 because the high-frequency ripple which is generated from the IC is routed over the C19 pads and therefore it is filtered.

Keep the resonance frequency in mind. If noise is generated at >300MHz a "classic" 100nF 0603 (1608 Metric) X7R capacitor is too big because its resonance frequency is at about 20MHz and on frequencies bigger than that it starts to work like an inductor. A capacitor with 1nF or 100pF would be needed here.

To simulate that you can us REDEXPERT or SimSurfing. The size and the voltage rating of the capacitor plays a big role too.

There are two aspects:

  • Reduction of the noise and high-frequency ripple
  • Power delivery for the IC

The result of those two considerations is to use multiple capacitors in different technologies:

  1. A few hundred pF to a few nF (e.g. 100pF to 3.3nF in 0402 or 0603) as close as possible in the C19 way (route from the IC to the capacitor and then go down to planes with vias)
  2. A bigger ceramic cap with a few hundred nF (100nF - 1uF)
  3. A tantalum cap with a few uF

This is my approach to reduce EMC.